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implementing protection with virtual memory - computer architectureto enable the operating system to implement protection in the vm system the hw
disadvantages of address translationdisadvantages are following a program that is too large to be held in a part needs some special design that
paging supervisorthis part of the operating system built and manages the page tables if the due to dynamic address translation hardware a page
dynamic address translation if when executing an instruction a cpu fetches an instruction located at a specific virtual address or fetches data
paged virtual memorymostly all implementations of virtual memory divide the virtual address space of an application program into pages a page is a
write miss policy write allocate fetch on write fetch entire block then write word into block allocate a new block on each writ
replacement policyon a particular cache miss we require to evict a line to build room for the new linein an a-way set associative cache we have a
write hit policieswrite througho update next level on every writeo cache is always cleano a lots of traffic to next level
principle of localitytemporal base locality locality in time- if an item is referenced then it will tend to be referenced again soonspatial
applications of microprogrammingmicroprogramming application emulationo use of a micro program on 1 machine to execute programs initially
performance of pipelines with stallsa stall is reason of the pipeline performance to degrade the ideal performance
bubbling the pipelinebubbling the pipeline also known as a pipeline break or pipeline stall is a technique for preventing structural data and branch
eliminating hazards of pipeline - computer architecturewe can delegate the work of eliminating data dependencies to the compiler which can fill
hazard in pipeline - computer architecturea hazard in pipeline-removing a hazard frequently need that some instructions in the pipeline to be
branch control hazards in computer architecturebranching hazards also called control hazards take place when the processor is told to branch -for
structural hazards - computer architecturea structural hazard takes place when a part of the processors hardware is required by 2 or more than two
hazard computer architecturein the computer architecture a hazard is a possible problem that can occurs in a pipelined processor it concern to the
hazards of pipeline - computer architecturehazards when a programmer or compiler writes assembly program code they make the supposition that each
disadvantages of pipelinepipeline architecture has 2 major disadvantages first is its complexity and second is the inability to constantly run
types of pipelinesinstructional pipeline it is used where different stages of an instruction fetch and execution take place in a
pipelining - computer architecturethe pipeline definedaccording to john hayesa pipeline processor consists of a sequence of processing circuits
comparison between risc and cisc - computer architecturecisc emphasis on hardware includes multi-clockcomplex
risc approach - computer architecturethe risc processors only use easy instructions that can be executed within one clock cycle therefore the mult
cisc approach - cisc architecturethe main goal of cisc architecture is to finish a task in as few lines of assembly as possible as this is gain by
need of cisc cpu - computer architecturewhy is intel spending money and time to manufacture the pentium ii and the pentium iiithe answer of this