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Calculate the overall voltage gain Gv of a common-source amplifier for which gm = 3 mA/V, ro = 100 kO, RD = 10 kO, and RG = 10MO.
Neglecting the Early effect, verify that the MOSFET is operating in saturation with ID =0.5 Ma and VOV =0.3 V. What must the MOSFET's kn be?
Find the largest sinusoid vˆsig that the amplifier can handle while remaining in the saturation region. What is the corresponding signal at the output?
What is the amplitude of the current pulses in the drain of Q1,What is the amplitude of the voltage pulses at the drain of Q1.
If terminal Y is grounded, find the voltage gain from X to Z with Z open-circuited. What is the output resistance of the source follower?
The NMOS transistor in the common-gate amplifier of Fig.(b) has gm = 10 mA/V and a large ro.
Calculate the dc drain current ID taking into account VA. Now, what value must the drain resistance RD have?
It is required to bias the transistor to operate at an overdrive voltage VOV =0.2 V. What must the dc voltage at the drain be?
If the signal amplitude across the base-emitter junction is to be limited to 10 mV, what is the corresponding amplitude of vsig and vo?
An emitter follower is operating at a collector bias current of 0.5 mA and is used to connect a 10-kO source to a 1-kO load.
The output resistance increased to 250O when the source resistance was increased to 10 kO.
If vsig is disconnected from node X, node X is grounded, and node Y is disconnected from ground and connected to vsig.
When the Early effect is neglected, the overall voltage gain of a CE amplifier with a collector resistance RC =10 kO is calculated to be -100 V/V.
If the amplifier remained linear throughout this measurement, what must the values of gm and ro be?
We investigate the effect of changing the bias current IC on the overall voltage gain Gv of a CE amplifier.
Design the circuit of Fig. for a MOSFET having Vt = 1 V and kn = 4 mA/V2. Let VDD = VSS = 5 V.
Design the circuit in Fig. so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region.
Find the required value of (IDRS) and VG to limit ? ID/ID to ± 5%. What value of RS is needed if ID is 100 µA?
Evaluate Rin , Av o, and Ro for the case R1 = 100 kO , Rf = 1MO, gm= 100 mA/V, R2 = 100kO , and RL = 1 kO.
Calculate the overall voltage gain of a CS amplifier fed with a 1-M_ source and connected to a 10-kO load.
If a load resistance of 10 k O is connected to the output, what overall voltage gain Gv is realized?
If it is required to realize an overall voltage gain Gv of -10 V/V what gm is needed?
Two identical CS amplifiers are connected in cascade. The first stage is fed with a source vsig having a resistance Rsig = 200 kO .
If the peak voltage of the sine wave appearing between base and emitter is to be limited to 5 mV, what vˆsig is allowed.
If ß can be anywhere between 50 and 50, what is the corresponding range of / Gv/ ?