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q based on the 8421 bcd code for decimal digits 0 through 9 develop a block diagram for a bcd encoder and its implementation
q illustrate bcd-to-decimal decoding with a 4-to- 16 decoder and draw the corresponding truth
q draw a block diagramfor a 2-to-4 decoder obtain the truth table and develop a logic
qa excess-3 code is a 4-bit binary code for the 10 decimal digits and is found useful in digital computer arithmetic each combination is found by
q draw the logic diagram of an sr latch using only nand gates and obtain the truth table for that
q using a minimum number of nand gates realize the following boolean expression fabc sum mi 0 3 4 5
a show the equivalent nor realizations of the basic not or and and gatesb show the equivalent nand realization of the basic not and and or
q using k maps simplify the following boolean expressionsa f a middot macr b a middot bb f a middot c c middot d b middot c middot dc f
q the demorgans theorems suggest that the basic logic operations can be realized by use of inverters and nand gates only for the circuits shown in
q a depletion mosfet is given to have large va vp 28v idss 43 ma vds 45vand vgs 12va is themosfetoperating in the active regionb find idc comment
q in a depletion mosfet for which vp 3 v and idss 11ma the drain current is 3ma when vds is set at the largest value that will maintain ohmic
q find the parameter values vt and idss for a p- channel mosfet with id 0 when vgs le-3 v and id 5 ma when vgs vds -8vyou may neglect the effect
q find idealized expressions for the active and ohmic states and sketch the universal characteristics of an n-channel enhancement mosfet operated
q consider the mosfet circuit with variable voltage with rd 2k and vdd 12 v the static characteristics ofthe n-channel enhancement mosfet are given
q an n-channel enhancement mosfet operates in the active region with very large va vgs 6v v 4 v and i 1 ma calculate
q sketch gm versus vgs for a jfet with idss 10 ma vp 3v va 100 v and vds 10 v see what happens if va rarrinfin also sketch ro versus
q an n-channel jfet with a 300 v p 2 v and idss 10 ma is to be operated in the active mode determine id when vds 10 v andvgs
q for an n-channel jfet with va 350 v idss 10 ma and vp 3v find vds that will cause id 11 ma when vgs
q given that a silicon n-channel jfet has vp 5 v and idss 12 ma check whether the device is operating in the ohmic or active region when vgs -32 v
q an n-channel jfet is given to have vp 3v and idss 6 maa find the smallest value of vds when vgs -2 v if the operation is to be in the active
q for a p-channel jfet in its active region specify the polarities of voltages and the directions of conventional
q using the small-signal equivalent circuit of a bjt with gm 003 s beta 75 and va 65 v a load resistor rl is connected from the collector to the
q for a bjt with vbe 07v icbo 4 na ie 1 ma and ic 09 ma evaluate alpha ibise and
q the parameters of a bjt are given by alpha 098 icbo 90 na and ic 75 ma find beta ib and
q a silicon bjt has an emitter current of 5m aat 300 k when the bej is forward-biased by vbe 07 v find the reverse saturation current of the bej