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design op amp circuit to produce output vout which is related to inputs v1, v2 and v3 by expression vout= -(3v1+5v2+8v3). assume max permitted resistor value= 200k. use only one op amp
Compare GBN, SR, and TCP(no delayed ACK). Assume that the timeout values for all three protocols are sufficiently long such that 5 consecutive data segments and their corresponding ACKs can be recei
Describe the how the Hall Effect it is used to measure whether a semiconductor material is n-type or p-type. Sketch a diagram and show the critical measurements.
Calculate (i) the parallel capacitance C1 that would be required to change the power factor of the total load on the supply to 0.80 lagging and (ii) find the value of the supply current at this powe
Compute the polar form of the impedances shown below in rectangular form in parts a and b, and compute the rectangular form of the impedances shown below in polar form in parts c and d
Design a CMOS Differential pair amplifier with a low frequency gain of at least 30dB, while driving a resistive load 50 ohm. The available circuit components are NMOS transistor, PMOS transistor, r
a) The input of Hex- to - seven segment decoder is 1010. what will the display show. b) A priority encoder has all inputs activated. Which input will be encoded. Why.
For each of the following functions, put the equation in the form of a Shannon decomposition. Create a pass transistor schematic to implement the function. Count the number of NMOS and PMOS transist
A microcontroller manufacturer, Agduino, offers a single product which is produced at two different plants. The first plant located in college station produces 2/3 of the microcontrollers. The remai
A 150-MVA 15/200-kV single-phase power transformer has a 0.018ohm resistance and a 0.075ohm reactance. The magnetizing impedance is j80 per unit. a.) Find the equivalent circuit referred to the low-
A pool of 200 frames exists for paging of processes A, B, C, D, and E. The processes' page sizes are 100, 200, 50, 150, and 500, respectively. Assuming proportional frame allocation is being deploye
Describe why the intrinsic carrier concentration changes with temperature. This would include from very cold temperatures to 600K+ temperatures. Why does an extrinsic semiconductor become intrinsic
Describe and explain drift current and diffusion current in a PN junction in thermal equilibrium. What causes each In which directions are the electrons, holes, electron current, and hole current fl
A balanced Y-connected power system is known to have Van=100<-30o V and Vab=173.2 <0o V. If a balanced delta-connected load with 1200 W at a lagging PF of 0.8, what is the phase current of the
The available circuit components are NMOS transistor, PMOS transistor, resistors, capacitors and inductors. Ideal sources can only be used to generate the supply voltage VDD & GND.
Begin with a breadboard, wire, an RGB LED and some resistors. Using the forward voltages given in the RGB LED datasheet, calculate the correct current-limiting resistors needed to light each color o
(a)using 4 rectangles find the area of the region bounded by f(x)=x^2 +1, the axis from x=0 to x=2,(b) solve part (a) using n rectangles and the limit process as n -> infinity.
Assume R1 = 1 M-ohm, R2 = 3 M-ohm, and C = 1.5 F. Also take the initial voltage across the capacitance to be VC(0) = 4 V. The voltage source VS has a voltage of 9 etV. The switch is closed at time t
give three methods that are used to express logic relationship between inputs and outputs of a logic gate, for example a three-inputs NOR gate.
Scenario/Summary: At least two of the following simulations must be attempted by the student. Verify Loop Analysis Method by MultiSim simulation Verify Superpposition Theorem Method by MultiSim simula
Three capacitors are found that each have an impedance of -j2.0, and they are connected in parallel with the load in a wye configuration. Determine the power factor of the combined load as seen by t
Can A Buck Converter with Synchronous rectifier operate in DCM at a light load If the load is disconnected how does this affect the Inductor current
(1) In a lab experiment on parallel Resonance circuit with switch closed, What is the phase relationship between Ic and IL at Is minimum (2) Why is the source current , Is, minimum at a given
If the cost of heat rises by $200 per year (uniform gradient) after the next year and the owner plans to keep the present building for 15 more years, if the interest is 10% per year, what is the cos
If you are asked to build an 8 bit odd parity generator/ checker with the output ERROR=1. when there is a 1 bit error, which type of gates, XOR or XNOR is simpler to use Explain