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control unit cu every pes are under the control of one control unit cu controls the inter communication among the pes there is a local memory of
efficiency of vector processing over scalar processingwe know that a sequential computer processes scalar operands one at a time thus if we have to
register-to-register architecture in this organization results and operands are accessed not directly from the main memory by the scalar or vector
memory-to-memory architecturethe pipelines can access vector operands intermediate and final results directly in the main memory this needs the
vector processing with pipeliningsince in vector processing vector instructions perform the similar computation on dissimilar data operands
vector-memory instructions when vector operations with memory m are executed then these are vector-memory instructions these instructions are denoted
vector reduction instructions when operations on vector are being deduced to scalar items as the result then these are the vector reduction
vector-scalar instructions in this type when the combination of vector and scalar are fetched and saved in vector register these instructions are
vector-vector instructionsin this type vector operands are fetched by the vector register and saved in another vector register these instructions are
vector processing a vector is an ordered set of the similar type of scalar data items the scalar item can be a floating point number a logical
performance and issues in pipeliningthroughput throughput of a pipeline can be defined as the number of results that have been getting per unit
performance and issues in pipeliningefficiency the efficiency of a pipeline can be calculated as the ratio of busy time to the entire time
performance and issues in pipeliningspeedup firstly we get the speedup factor that is we see how much speed up performance we get through
arithmetic pipelinesthe method of pipelining can be applied to a variety of complex and slow arithmetic operations to speed up the processing time
classification according to part of instruction and dataaccording to the parts of instruction and data following parts are identified under this
classification according to pipeline configurationaccording to the configuration of a pipeline the following parts are recognized under this
arithmetic pipelinethe complex arithmetic operations like floating point and multiplication operations use a lot of the time of the alu these
classification according to level of processingaccording to this classification computer operations are classified as arithmetic operations and
classification of pipeline processorsin this part we explain various types of pipelining that can be useful in computer operations these types depend
pipelined processorhaving discussed pipelining now we can describe a pipeline processor a pipeline processor can be distinct as a processor that
objectivesafter going through this part you will be capable to examine the meaning of pipeline processing and explain pipeline processing
parallel computer architecture introductionwe have talked about the classification of parallel computers and their interconnection networks in that
design issues of interconnection networkthe following are the problems which should be considered while preparing an interconnection network1
dimensionality of interconnection networkdimensionality signify the arrangement of nodes or processing elements in an interconnection network in
static and dynamic interconnection networkin a static network the connection among input and output nodes is permanent and cannot be changed static