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simplify the boolean expression f cb ca b cans simplification of the given boolean expression f c b c abc given asf c bc abc cb cc abc cb c
perform 2s complement subtraction of 710 - 1110 ans 2s complements subtraction of 710 - 1110firstly convert the decimal numbers 7 and 11 to there
which device consume minimum power ans minimum power consume by cmos as in its one p-mos and one n-mos transistors are connected in complimentary
which of the memories stores the most number of bits ans most number of bits stores in 32m x 8as 25 x 220 225therefore 1m 220 1k x 1k 210 x
which of the logic gates are known as universal gates ans nand and nor are termed as universal gates since any digital circuit can be
for jk flipflop j 0 k1 the output after clock pulse will be ans j0 and k1 such inputs will reset the flip-flop after the clock pulse therefore
how many address bits are required to represent 4k memory ans 12 address bits are required for representing 4k memory as4k 22 x 210
how many select lines will a 321 multiplexer will have ans 5 select lines will be required for 32 inputs as 25
how many two input and gates and two input or gates are required to realizey bdceab ans here three product terms therefore three and gates of two
the decimal equivalent of binary number 10101 is ans 1x24 0x23 1x22 0x21 1x20 16 0 4 0 1
the 2s complement of the number 1101110 is ans 1s complement of 1101110 is 0010001 ans hence 2s complement of 1101110 is 0010001 1
a weighted resistor digital to analog converter using n bits requires a total of ans digital to analog converter a weighted resistor using n bits
the conversation speed of an analog to digital converter is maximum with which techniqueans with parallel comparator ad converter technique the
the information in rom is stored ans by the manufacturer throughout fabrication of the
the output of a jk flipflop with asynchronous preset and clear inputs is 1 the output can be changed to 0 with which conditions ans through applying
an eight stage ripple counter uses a flip-flop with propagation delay of 75 nanoseconds the pulse width of the strobe is 50ns the frequency
a full adder logic circuit will have ans the full adder logic circuit also accounts the carry ip generated in the earlier stage and it will add two
karnaugh map is used for the purpose of ans karnaugh map is used for to minimize the terms in a boolean
the logic 0 level of a cmos logic device is approximately ans the low level is 0 volts approx in cmos logic
a universal logic gate is one which can be used to generate any logic function which one is a universal logic gateans nand gate is a universal
the result of adding hexadecimal number a6 to 3a is ans the result will be
when an input signal a11001 is applied to a not gate serially its output signal is ans first input applied will be lsb 00110 as a11001 is serially
the excess-3 code of decimal 7 is represented by ans an excess 3 code of decimal 7 is equal to the binary code
which of following can not be accessed randomly dram sram rom or magnetic tape ans magnetic tape cannot be accessed randomly it can only be accessed
how many two-input and and or gates are required to realize ycdefg ans ycdefgno of two ip and gates2no of two ip or gates 2one or gate to or cd and