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analysis of sortbitonicxthe bitonic sorting network needs log n number of phases for performing task of sorting the numbers the first n-1 phases of
q demonstration of sorting problemthe term sorting implies organising elements of a provided set of elements in a specific order ie descending order
as in pram there was not any direct communication medium between processors so a different model called as interconnection networks have been
q in pram model steps required for executing an algorithmsubsequent steps are performed by a pram model whenever executing an algorithm iread phase
factor which helps in analysis of parallel algorithms is the total number of processors needed to deliver a solution to a provided problem so for a
q example of asymptotic notationsthe function f n belongs to the set gn if there exists positive constants c such that for satisfactorily large
q describe big notationbig o notation the set o gn comprises all functions fn for that there exists positive constants c such that for
q explain about theta notationtheta theta notation the set theta gn comprises all functions fn for that there exist positive constants c1c2 such that
asymptotic notations these notations are used for evaluating functions assume we have two functions fn and gn defined on real numberstheta
q computation step in time complexity of an algorithmso first in the computation step the local processor executes an arithmetic and logic operation
q explain time complexity in parallel algorithmsas it takes place nearly everyone who implement algorithms wish to know how much of an individual
a generic algorithm is mostly analysed on basis of subsequent parameters the space complexity amount of space required and the time complexity
q design issues of multi-threaded processorsto accomplish the maximum processor utilization in a multithreaded architecture the subsequent design
q multithreaded architectureit is clear at the moment if we provide a lot of contexts to multiple threads then processors with numerous contexts are
concept of multithreading this problem rises in design of large scale multiprocessors like mpp so a solution for optimizing this latency must be
q describe about remote-load latency problemwhen one processor requires some remote loading of data from other nodes then processor has to wait for
q define synchronization latency problemif two simultaneous processes are executing remote loading then its not recognized by what time two processes
superscalar architecture was designed to increase the speed of the scalar processor but it has been realized its not easy to apply subsequent are a
q hardware required for superscalar processingfor applying superscalar processing a number of special hardware should be offered that is discussed
in scalar processors just one instruction is implemented per cycle which means just one instruction is issued for each cycle and only that one
q explain working of bit serial associative processor when associative processor accepts bit serial memory organization subsequently it is known as
q working of fully parallel associative processorfully parallel associative processor this processor accepts the bit parallel memory organisation
cache-only memory access model coma as we have considered earlier shared memory multiprocessor systems can use cache memories with each processor for
non-uniform memory access model numain shared memory multiprocessor systems local memories are able to be connected with every processor the
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