Redesign the floating-point multiplier in Figure 7-7 using a common 5-bit full adder connected to a bus instead of two separate adders for the exponents and fractions.
(a) Redraw the block diagram and be sure to include the connections to the bus and include all control signals.
(b) Draw a new SM chart for the new control.
(c) Write the VHDL description for the multiplier or specify what changes need to be made to an existing description.
