1. Develop the Boolean equation for the Y0 output of a decimal-to-binary encoder with inputs I0-I9 and outputs Y0-Y3.
2. Write the VHDL ARCHITECTURE file for the Y(5) output only for a 8-to-1 demultiplexer. The inputs are D, the selects S0-S2, and the outputs Y(0)-Y(7). The select lines are BIT_VECTOR types, the data is BIT type and the outputs are BIT_VECTOR types.
3. Derive the Boolean equation for A = B, when A and B are 4-bit numbers.
4. A J-K flip-flop is wired with J=K=1. If a 20 kHz clock with a 10% duty cycle is used, what are the output frequency and duty cycle of the flip-flop output?