Response to the following problem:
The PMOS transistor in the CS amplifier of Fig. has Vtp 0.7 V and a very large / VA/.
(a) Select a value for RS to bias the transistor at ID = 0.3 mA and / VOV //= 0.3 V. Assume vsig to have a zero dc component.
Select a value for RD that results in Gv =-10 V/V.
(b) Find the largest sinusoid vˆsig that the amplifier can handle while remaining in the saturation region. What is the corresponding signal at the output?
(c) If to obtain reasonably linear operation, vˆsig is limited to 50 mV, what value can RD be increased to while maintaining saturation-region operation? What is the new value of Gv?
