Assignment
Suppose that our MIPS core instruction subset is expanded to include another instruction, the or immediate (ori) instruction. Answer each of the following questions about potential multi-cycle datapath modifications.
1. What is the minimum number of new states required for the FSM (finite state machine) description of the ori instruction?
2. Identify any new control bits that the control unit would have to output for the ori instruction.
3. For each new state required for ori, list the proper setting for all control bits used in the new state and indicate how the new state is entered.
4. Identify any new hardware devices that are required in the datapath to support the execution of the ori instruction.