Solution is available for
Part -2:
Chapter3-Arithmetic, Logic Instructions, and Programs Homework
Part -1:
The x86 Microprocessor Homework
Section 1.1: Brief History of the x86 Family
1. Name three features of the 8086 that were improvements over the 8080/8085
a. processor, as opposed to the nonpipelined 8080/8085. The 8086 capacity of 1 megabyte of memory exceeded the 8080/8085 maximum of 64K bytes of memory.
b. 8080/8085 was an 8-bit system, which could work on
only 8 bits of data at a time.
i. Data larger than 8 bits had to be broken into 8-bit pieces
to be processed by the CPU.
c. 8086 was a pipelined
2. What is the major difference between 8088 and 8086 microprocessors?
8086 has a 16-bit data bus and 8088 has an 8-bit data bus
3. Give the size of the address bus and physical memory capacity of the following:
(a) 8086
- The 8086 capacity of 1 megabyte of memory exceeded the 8080/8085 maximum of 64K bytes of memory
(b) 80286
- 16-bit internal & external data buses
- 24 address lines, for 16mb memory. (224 = 16mb)
- Virtual memory
(c) 80386
- 32-bit internally/externally, with a 32-bit address bus.
- Capable of handling memory of up to 4 gigabytes. (232)
- Virtual memory increased to 64 terabytes. (246)
4. The 80286 is a ____16___-bit microprocessor, whereas the 80386 is a ___32_____- bit microprocessor.
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D1 |
D0 |
5. State the major differences between the 80386 and the 80386SX.
a) 80386
- 32-bit internally/externally, with a 32-bit address bus.
- Capable of handling memory of up to 4 gigabytes. (232)
- Virtual memory increased to 64 terabytes. (246)
b) 80386SX
- 386SX, internally identical, but with a 16-bit external data bus & 24-bit address bus.
- This makes the 386SX system much cheaper
6. List additional features introduced with the 80286 that were not present in the 8086.
80286 can operate in one of two modes:
- Real mode - a faster 8088/8086 with the same maximum of 1 megabyte of memory.
- Protected mode - which allows for 16M of memory.
- Also capable of protecting the operating system & programs from accidental or deliberate destruction by a user.
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7. List additional features of the 80486 that were not present in the 80386.
- additional features such as cache memory.
- Cache memory is static RAM with a very fast access time
8. List additional features of the Pentium those were not present in the 80486.
- Separate 8K cache memory for code and data.
- 64-bit bus, and a vastly improved floating-point processor
9. How many transistors did the Pentium II use?
- 7.5 milli
10. Which microprocessor was the first to incorporate MMX technology on-chip?
- Pentium II processor
11. Give the additional features of the Pentium II that were not present in the Pentium.
- 7.5-million-transistor processor featured MMX (MultiMedia Extension) technology incorporated into the CPU.
- For fast graphics and audio processing
- Designed more for servers and business workstations with multiprocessor configurations.
12. Give all the data types supported by the Pentium 4
- Speeds of 1.4 to 1.5 GHz.
- System bus operates at 400 MHz
- Designed for heavy multimedia processing.
- Video, music, and graphic file manipulation on the Internet.
- New cache and pipelining technology & expansion of the multimedia instruction set make the P4 a high-end media processing microprocessor
13. Give all the data types supported by the Itanium
- Itanium architecture is designed to meet Internet-driven needs for servers & high-performance workstations.
- Itanium will have the ability to execute many instructions simultaneously, plus extremely large memory capabilities
14. Itanium has a 64-bit architecture - TRUE or FALSE
Section 1.2: Inside the 8086/88
1. Explain the functions of the EU and BIU
- The BIU accesses memory and peripherals, while the EU executes instructions previously fetched
2. What is pipelining, and how it makes the CPU execute faster.
- In a pipelined CPU, too much jumping around reduces
the efficiency of a program
3. Registers of the 8086 are either _16__-bits or __8__-bits in length.
4. List the 16-bit registers of the 8086.
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Section 1.3: Introduction to Assembly Language Programming
1. Write the Assembly language instruction to move value 124H into register BX
2. Write the Assembly language instructions to add the values 16H and ABH. Place the result in register AX.
3. No value can be moved directly into which register?
4. What is the largest hexadecimal and decimal values that can be moved into
(a) 16-bit register?
(b) 8-bit register?
Section 1.4: Introduction to Program Segments
1. A segment is an area of memory that includes up to ___64K ____ bytes.
2. How large is a segment in the 8086? Can the physical address 346E0 be the starting address for a segment? Why or why not?
3. State the difference between the physical and logical addresses.
- The physical address - the 20-bit address actually on the address pins of the 8086 processor, decoded by the memory interfacing circuitry
- The logical address - which consists of a segment value and an offset address
4. The physical address is a _20_____-bit address; an offset address is a _64K-byte ____-bit address.
5. Which register is used as the offset register with segment register CS?
Section 1.5: The Stack
1. Which registers are used to access the stack?
- The SS (stack segment) register.
- The SP (stack pointer) register
2. With each PUSH instruction, the stack pointer SP is (circle one) incremented or decremented
3. With each POP instruction, the stack pointer SP is (circle one) incremented or decremented
4. List three possible logical addresses corresponding to physical address 143F0
Section 1.6: Flag Register
1. The ADD instruction can affect which of the flag register?
- CF (carry flag); PF (parity flag); AF (auxiliary carry flag).
- ZF (zero flag); SF (sign flag); OF (overflow flag).
2. The carry flag will be set to 1 in a 8-bit ADD if there is a carry out from bit ____
3. The carry flag will be set to 1 in a 16-bit ADD if there is a carry out from bit ____
Part -2:
Chapter3-Arithmetic, Logic Instructions, and Programs Homework
Section 3.1: Unsigned Addition and Subtraction
1. The ADD instruction that has the syntax "ADD destination, source" replaces the ____________ operand with the sum of the two operands.
2. Why is the instruction "ADD DATA_1, DATA_2" illegal?
3. Rewrite the above instruction in the right form.
4. The ADC instruction that has the syntax "ADC destination, source" replaces the ____________ operand with the sum of ________________.
5. The execution of part (a) below results in ZF=1, whereas the execution of part (b) results in ZF=0. Explain why?
(a) MOV BL,04FH (b) MOV BX, 04FH
ADD BL, 0B1H ADD BX, 0B1H
6. The instruction "LOOP ADD_LOOP" is equivalent to what two instructions?
7. Show how the CPU would subtract 05H from 43H.
8. If CF=1, AL =95, and BL=4F prior to the execution of "SBB AL,BL", what will be the content of AL after the subtraction?
Section 3.2: Unsigned Multiplication and Division
1. In unsigned 8-bit multiplication of a byte in AL, the product will be placed in register(s) _________________________. Show an example to illustrate.
2. In unsigned 16-bit multiplication of AX with BX, the product of will be placed in register(s) _________________________. Show an example to illustrate.
3. In unsigned multiplication of CX with a byte in AL, the product of will be placed in register(s) _________________________. Show an example to illustrate.
4. In unsigned 8-bitdivision of a byte in AL by a byte in DH, the quotient will be placed in _________and the reminder in ______________. Show an example to illustrate.
5. In unsigned 16-bitdivision of a wordin AX by a word in DATA_1, the quotient will be placed in _________and the reminder in ______________. Show an example to illustrate.
6. In unsigned 16-bitdivision of a wordin AX by a byte in DATA_1, the quotient will be placed in _________and the reminder in ______________. Show an example to illustrate.
7. In unsigned 32-bitdivision of a double wordin DX AX by a word in CX, the quotient will be placed in _________and the reminder in ______________. Show an example to illustrate.
Section 3.3: Logic Instructions
1. Use operands 4FCAH and C237H to perform (a) AND (b) OR (c) XOR
2. ANDing a word operand with FFFFH will result in what word of the operand?
3. To set all bits of an operand to 0, it should be ANDed with ____________.
4. To set all bits of an operand to 0, it could be ORed with ____________.
5. XORing an operand with itself results in what value for the operand?
6. Show the steps if value A0F2H were shifted left three times.
7. Show the steps if value A0F2H were shifted right three times.
Section 3.4: BCD and ASCII Conversion
1. For the following decimal numbers, give the packed BCD and unpacked BCD representations.
(a) 15 (b) 99
2. DAA instruction must be used after the ADD instruction
3. DAS instruction must be used after the SUB instruction
4. Find the value of AL after the following code is executed.
MOV AL, 29H
ADD AL, 18H
DAA
RET
Section 3.5: Rotate Instructions
1. What is value of BL after the following?
MOV BL, 25H
MOV CL, 4
ROR DX. CL
RET
2. What are the values of DX and CF after the following?
MOV DX, 3FA2H
MOV CL, 7
ROL DX, CL
RET
3. What is the values of CF after the following?
SUB BH,BH
STC
RCR BH,1
STC
RCR BH, 1
RET
4. What is the value of BX after the following?
MOV BX,0FFFFH
MOV CL, 5
CLC
RCL BX, CL
RET
5. Why does "ROR BX,5" give an error. How would you change the code to make it work?
Part -3:
-Signed Numbers, Strings, and TablesHomework
Section 6.1: Signed Number Arithmetic Operations
1. In an 8-bit operand, bit ___ is used for the sign but, whereas in a 16-bit operand, bit ___ is used for the sign bit.
2. Convert 16H to its 2's complement.
3. The range of byte-sized signed operands is ____ to _____. The range of word--sized signed operands is ______ to _______.
4. Explain the difference between overflow and a carry.
5. Explain the purpose of the CBW and CWD instructions. Demonstrate the effect of CBW on AL=F6H. Demonstrate the effect of CWD on AX=124CH
6. The instruction for signed multiplication is ________. The instruction for signed division is ________.
7. Explain the difference between the SHR and SAR instructions.
8. For each of the following instructions, indicate the flag condition necessary for each jump to occur
a. JLE
b. JG