What is false sharing and how does it affect parallelism in a program explain using the necessary architectural details? How can you prevent or reduce the impact of it's occurence?
What is cache coherence and how do the snooping and directory protocol implementations differ?
What is a memory barrier and how does this impact parallelism in a computer architecture that can execute instructions out of order.
What is the TLB and what role does it play in the computer architecture in the memory hierarchy?