a) Write the VHDL code for a 2-bit( two flip-flops) down-counter with a synchronous reset, using D FlipFlop.
b) Based on your VHDL code, and assuming D-Flip Flops, draw the logic circuit that you believe will result after some commercial VHDL compiler and synthesizer has been used to run your code.
c) Using your knowledge of ‘State Machine' design from logic design principles, draw the state diagram for the 2-bit down-counter, generate the state transition table, the flip-flip input equations for D Flip Flop, and finally the logic diagram of the system.