Use Pareto analysis to investigate the following data collected on a printed-circuit-board assembly line:
DEFECT
|
NUMBER OF DEFECT OCCURRENCES
|
Components not adhering
|
143
|
Excess adhesive
|
71
|
Misplaced transistors
|
601
|
Defective board dimension
|
146
|
Mounting holes improperly positioned
|
12
|
Circuitry problems on final test
|
90
|
Wrong component
|
212
|
a) Prepare a graph of the data.
b) What conclusions do you reach?