Two competing architectures were developed for improving the architecture of the central processing unit, and different processors are conventional to each one. Both had their power and weaknesses, and as such also had supporters and detractors.
CISC: Complex Instruction Set Computers
Earlier developments were based in the order of the idea that making the CPU more complex and supporting a superior number of potential instructions would lead to amplified performance. This thought is at the root of CISC processors, such as the Intel x 86 ranges, which have very large instruction sets reaching up to and on top of three hundred separate instructions. They also have amplified complexity in other areas, with many more specialized addressing modes and registers also being implemented and variable length of the instruction codes themselves.
Performance was getting better here by allowing the generalization of program compilers, as the range of more advanced instructions available led to fewer refinements having to be made at the compilation process. But, the complexity of the processor hardware and architecture that resulted can cause such chips to be hard to understand and program for, and also means they can be exclusive to produce.
RISC: (Reduced Instruction Set Computers)
In conflict to CISC, the mid-1980s saw the beginnings of the RISC philosophy. The plan here was that the best way to get better performance would be to make simpler the processor workings as much as probable. RISC processors, for example the IBM PowerPC processor, have a greatly simplified and concentrated instruction set, numbering in the region of one hundred instructions or less. Addressing modes are basic back to four or less, and the length of the codes is fixed so as to allow standardization across the instruction set.
Changing the architecture to this extent means that fewer transistors are used to create the processors. This means that RISC chips are much cheaper to produce than their CISC counterparts. As well the reduced instruction set means that the processor can execute the instructions more rapidly, potentially allowing for greater speeds. However, only allowing such easy instructions means a greater burden is placed upon the software itself. Less instructions in the instruction set means a greater stress on the efficient writing of software with the instructions that are accessible. Supporters of the CISC architecture will point out that their processors are of good sufficient performance and cost to make such efforts not worth the problem.
CISC RISC
Large (100 to 300) Instruction Set Small (100 or less)
Complex (8 to 20) Addressing Modes Simple (4 or less)
Specialized Instruction Format Simple
Variable Code Lengths Fixed
Variable Execution Cycles Standard for most
Higher Cost / CPU Complexity Lower
Compilation Simplifies Processor design
Processor design Complicates Software