Question: What is the maximum theoretical speedup ratio of a direct-mapped cache with the following parameters:
Main memory access time 100 ns
Cache memory access time 20 ns
Hit ratio 0.95
This theoretical speedup ratio cannot normally be achieved in an actual system, as a real processor cannot operate in 100 ns when accessing main memory and 20 ns when accessing the cache. Assume that a real system has the following parameters:
Processor 68000
System clock 16 MHz
Main memory wait states 4
Cache memory wait states 0