A CMOS cascode amplifier such as that in Fig. 8.34(a) has identical CS and CG transistors that have W/L = 5.4 μm/0.36 μm and biased at I = 0.2 mA. The fabrication process has μnCox = 400 μA/V2, and V1A = 5 V/μm. At what value of RL does the gain become -100 V/V? What is the voltage gain of the common-source stage?