The capacitance of a MOS structure is shown in the attached figure. (n+ polysilicon gate, SiO2 insulator, Si substrate). The plot is not necessarily to scale.
(A). Is the Si substrate n-type or p-type? Is the channel n-type or p-type? Is it NMOS or PMOS? Explain.
(B). Given substrate doping of 1E16cm-3(you will have to identify the doping type from (A)), and oxidethickness Tox = 200A°. Find Ci and Cmin, which are the maximum and minimum MOS capacitance values.
(C). Qualitatively plot the C-V curve for the same device measured at high frequency. Which operation region (accumulation, depletion, inversion) is different? Explain the difference.
