Question: Synchronizer Error Probability: Consider a synchronizer built by cascading four edge-triggered flip-flops clocked by a 500-MHz clock. Each flip-flop has parameters Tr = 200 ps, ts = 100 ps, th = 100 ps, and tdCQ = 500 ps. What is the probability of synchronization failure on each input transition? What is the mean time between synchronization failures if the input toggles at 1 MHz?