Question: 1. Some DRAMs support page, nibble, and static column modes (but not all three of these modes together). Explain what these modes do and how they may benefit the systems designer.
2. What (in the context of DRAMs) is a read-write cycle and how does it differ from a conventional memory access?
3. What is the difference between burst mode and distributed mode refreshing? What are the advantages and disadvantages of these modes from the point of view of the systems designer?
