A computer system has an 8-bit address bus, an 8-bit data bus, and control signals READ and WRITE. The CPU for this system uses isolated I/O and also has control signal IO/M' that is 1 for I/O operations and 0 for memory operations. It has 64 × 8 of ROM starting at address 20H constructed from 32 × 4 chips; 32 × 8 of RAM starting at address 00H constructed using 32 × 8 chips; an input device with no READY signal at address D0H; and an output device with no READY signal at address FFH. Show the design for the memory subsystem. Do not show the design of the I/O subsystem.