Problem: A byte-addressable computer has a small data cache capable of holding eight 32-bit words. Each cache block consists of one 32-bit word. When a given program is executed, the processor reads data from the following sequence of hex addresses:
200, 204, 208, 20C, 2F4, 2F0, 200, 204, 218, 21C, 24C, 2F4
This pattern is repeated four times.
(a) Show the contents of the cache at the end of each pass through this loop if a direct-mapped cache is used. Compute the hit rate for this example. Assume that the cache is initially empty.
(b) Repeated part (a) for a 2-way associative-mapped cache that uses the LRU replacement algorithm.
(c) Repeated part (a) for a four-way set-associative cache.