Q. Fundamental differences between RISC and CISC architecture?
Fundamental differences between RISC and CISC architecture. The following table lists following differences:
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CISC
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RISC
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1. Large number of instructions - from
120 to 350.
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1. Relatively fewer instructions - less than 100.
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2. Employs a variety of data types and a large number of addressing modes.
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2. Relatively fewer addressing modes.
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3. Variable-length instruction formats.
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3. Fixed-length instructions generally 32 bits, easy to decode instruction format.
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4. Instructions manipulate operands residing in memory.
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4. Mostly register-register operations. The only memory access is by explicit LOAD/STORE instructions.
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5. Number of Cycles Per Instruction (CPI) varies from 1-20 depending upon the instruction.
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5. Number of CPI is one as it uses pipelining. Pipeline in RISC is optimised due to simple instructions and instruction formats.
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6. GPRs varies from 8-32. But no support is available for the parameter passing and function calls.
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6. Large number of GPRs are available which are mainly used as Global registers and as a register based procedural call and parameter passing stack so optimised for structured programming.
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7. Microprogrammed Control Unit.
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7. Hardwired Control Unit.
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