Project Title: A Specialized Simple RISC Machine (SSRC) To Control the Functions of Motion Detection Camera Device.
One sentence Description of this new automated device:
My RISC machine automates a motion detection camera by automaticall triggering the record function of the camera when motion is detected.
The Four (4) Functions Automated By The RISC Machine:
1) The camera will sweep the room (move side to side) while no motion is detected.
2) The camera will stop and focus/follow when motion is detected.
3) The record function will trigger when motion is detected.
4) Recorded video will store to SD card that is inserted when no more motion is detected.
Eleven (11) SSRC hardware features specified to support the automation design:
1) ALU features
a. ALU feature 1 is a XXX based on the XXX
b. ALU feature 2 is a XXX based on the XXX
2) Clock Rate needed will be 85MHz based on the fastest clock rate of the camera.
3) Word length needed will be 32 bitbased on the SRC
4) Bus architecture Design
a. Tribus design will be used based on the XXX
5) Number of General Purpose Registers needed would be 32-32 bit regi based on the SRC.
6) Number and title of special Registers that are necessary:
a. Instruction Register
b. Program Counter Register
c. Video Record Register
d. Saved Video Register
7) Control Unit design
a. Feature 1 XXX based on the XXX
8) Extra instructions added for direct control included in the RISC drawing
a. Reset
b. Record
9) Input signals added for internal control included in the RISC
a. Sensor Line 1 from the motion sensor on camera.
10) Output signals added for external control included in the RISC
a. Output line 1 to control the Sweep Motion.
b. Output line 2 to control Focused Motion.
11) Memory added for direct control included in the SSRC
a. Total Main Memory needed will be 64 GB based on the storage of the camera and SD card.
Table 1 is an estimate to the extent the automated function impacts the RISC architecture design. The rating scale is from a zero (0) which means the function listed would use a standard unit that does not specifically impact the design of this RISC Hardware architecture structure. A three (3) is a neutral level in that the RISC Hardware element could be tailored for the function, but it is not a critical decision either way. A five (5) means the architecture would have to be designed and specifically considered to be certain to satisfy this function for optimal performance.
Table 1: RISC hardware Design Feature Impact from the Security_For_U Functions
|
Elements
|
Sweep the room
|
|
Follow motion
|
|
Record video
|
|
Store recorde
|
|
while no motion is
|
|
when detected
|
|
while motion is
|
|
video when no
|
|
detected
|
|
|
|
detected
|
|
more motion det.
|
|
1) ALU
|
|
3
|
|
3
|
|
5
|
|
5
|
|
2) Clock Rate
|
|
3
|
|
3
|
|
3
|
|
3
|
|
3) Word Length
|
|
3
|
|
3
|
|
3
|
|
3
|
|
4) Bus Architecture
|
|
3
|
|
3
|
|
3
|
|
3
|
|
5) GPRs
|
|
3
|
|
3
|
|
3
|
|
3
|
|
6) Special Registers
|
|
0
|
|
0
|
|
5
|
|
5
|
|
7) Control Unit
|
|
3
|
|
3
|
|
5
|
|
5
|
|
8) Extra Instructions
|
|
3
|
|
3
|
|
5
|
|
5
|
|
9) Input Signals
|
|
5
|
|
5
|
|
5
|
|
5
|
|
10) Output Signals
|
|
X
|
|
X
|
|
5
|
|
5
|
|
11) Memory
|
|
0
|
|
0
|
|
5
|
|
5
|