Answer the following questions.
Question 1) Write down the difference between a entity and an architecture declaration.
Question 2) Which is better between Data flow modelling or behavioural modelling and explain why?
Question 3) Describe the use of WAIT statement with suitable examples.
Question 4) Write down the difference between a library and a package? Describe in detail.
Question 5) What do you mean by overloading? Describe in detail.
Question 6) Write down the difference between a CPLD and a FPGA implementation.
Question 7) What do you mean by PEEL? Describe in detail.
Question 8) Write down the major features of a structural model in VHDL language.
Question 9) Describe the Generic statement in VHDL language.
Question 10) Explain the function of a compiler in VHDL.