1. (a) If gate delays are 5 ns, what is the delay of the fastest 4-bit ripple carry adder? Explain your calculation.
b) If gate delays are 5 ns, what is the delay of the fastest 4-bit adder? What kind of an adder will it be? Explain your calculation.
2. Develop a VHDL model for a 16-bit carry look-ahead adder utilizing the 4-bit adder from Figure 4-10 as a component.
