1. How many transistors are used in a 2-input CMOS NANO gate? How many of each type are used?
2. (Hobbyists only.) Draw an equivalent circuit for a CMOS NANO gate using two single-pole, double-throw relays.
3. For a given silicon area, which is likely to be faster, a CMOS NANO gate or a CMOS NOR?
4. Define "fan-in" and "fanout." Which one are you likely to have to calculate?