The transistor parameters for the circuit in Figure are: VT N = 0.8 V for all enhancement-mode devices, VT N = -2 V for the depletion-mode devices, and
= 60 μA/V2 for all devices. The width-to-length ratios of ML2 and ML3 are 1, and those for MD2, MD3, and MD4 are 8.
(a) For vX = 5 V, output vO1 is 0.15 V, and the power dissipation in this inverter is to be no more than 250 μW. Determine (W/L)M L1 and (W/L)M D1.
(b) For vX = vY = 0, determine vO2.
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