Anearlier form of logic circuits, now obsolete, utilized NMOS transistors only and was appropriately called NMOS logic. The basic inverter, shown in Fig. P14.28, utilizes an NMOS driver transistor Q1 and another NMOS transistor Q2, connected as a diode, forms the load of the inverter. Observe that Q2 operates in saturation at all times. Assume
Vt1 = Vt2 = Vt, λ1 = λ2= 0, and denote|√kn1/kn2 by kr. Also neglect the body effect in Q2 (note that the body of Q2, not shown, is connected to ground).
(a) Sketch i-v for Q2 and hence show that for vI low (i.e., vI tn), the output voltage will be VOH =VDD -Vt. (Hint: Although Q2 will be onducting zero current, it will have a voltage drop of Vt .)
(b) TakingVIL as the value of vI at whichQ1 begins to conduct and vO begins to fall, find VIL .
(c) Find the relationship between vO and vI in the transition region. This is the region for which vI > Vt and both Q1 and Q2 are operating in saturation. Show that the relationship is linear and find its slope.
(d) If VOL ? 0 V, find the current IDD drawn from VDD and hence the average power dissipation in the inverter, assuming that it spends half the time in each of its two states.
(e) Find numerical values for all the parameters asked for above for the case VDD = 1.8 V, Vt = 0.5 V, (W/L)1 = 5, (W/L)2 = 1 5 , and μnCox = 300 μA/V2.
![2339_VDD.png](https://secure.tutorsglobe.com/CMSImages/2339_VDD.png)