An NMOS inverter with saturated load is shown in given Figure (a). The bias is VDD = 3 V and the transistor threshold voltages are 0.5 V.
(a) Find the ratio K D/KL such that vO = 0.25 V when vI = 3 V.
(b) Repeat part (a) for vI = 2.5 V.
(c) If W/L = 1 for the load transistor, determine the power dissipation in the inverter for parts (a) and (b).
