Using MultiSim, construct the circuit shown as Figure 3.
Set the sampling rectangular pulses (sampling clock) as following:
Vp (pulse value) = -5 volts
Period: 0.125 ms
Pulse width 0.02 ms
Set the sinusoidal voltage source as the following
Frequency = 1000 Hz
Vp (amplitude)=1 volts=0.707 rms,
DC offset = 1 volt
Explanation of the circuit: Two opamps on the top are the buffer amplifiers before and after sampler. Sampler is a JFET used as analog switch; its gate is driven by the narrow pulse train as specified above. There are two identical active lowpass filters used for anti-aliasing and anti-imaging with 2nd order Sallen-Key topology.
Before simulation, answer the following:
Determine the cut-off frequency of the anti-aliasing and anti-imaging active filters used in the circuit.