Logic to implement transfers among three registers, R0, R1, and R2, is to be implemented. The register transfers are as follows:
CA: R1 <- R0
CB: R0 <- R1, R2 <- R0
CC: R1 <- R2, R0 <- R2
Using registers and dedicated multiplexers, draw a detailed logic diagram of the hardware that implements a single bit of these register transfers.
Draw a logic diagram of simple logic that converts the control variables CA, CB, and CC as inputs to outputs that are the SELECT inputs for the multiplexers and LOAD signals for the registers.