Consider a RAM of 4M words x 32 bits/word that has Data lines, Address lines, Read and Write and Select command lines.
1. How many chips are needed to implement the RAM memory if are used RAM chips 1MB
2. How many address lines are needed to access the memory?
3. How many data lines are needed to access the memory?
4. Draw a block diagram and label all pins (lines) that are required for the RAM integrated circuit (chip) as input, output, or input/output.
3.Consider a CPU that can address 4M words x 32 bits/word of memory.
1. Show the layout of an associative cache that can hold
256K words x 32 bits/word.
1. Show the layout of a two-way set-associative cache that can hold
256K words x 32 bits/word