Digital logic design and computer organization


Question 1:

A) Describe the functional units of a computer and describe each unit in detail.

B) Convert the given numbers with the indicated bases to decimal:

(4310)5, (198)12, (16.5)16, (26.24)8

Question 2:

A) Draw the multiple-level NAND circuit for the given expression:

(AB' + CD')E + BC(A + B)

B) Reduce the given Boolean expressions to the indicated number of literals:

a) A'C' + ABC + AC' to three literals
b) (x'y' + z)' + z + xy + wz to three literals
c) A'B(D' + C'D) + B(A + A'CD) to one literal
d) (A' + C) (A' + C') (A + B + C'D) to four literals.

Question 3: Draw a 2-to-4 line decoder with an enable input constructed with NAND gates and describes its operation with the help of a truth table.

Question 4: With an example how multiplication of two fixed point binary numbers using Booth’s algorithm. And as well draw hardware circuit for implementing the same.

Question 5: Write the algorithm for adding and subtracting numbers in signed-2's complement representation.

Question 6:

a) Describe the compatibility of the IA-32 register structure with earlier Intel processor register structures.

b) Which of the given IA-32 instructions would cause the assembler to issue a syntax error message? Why?

Question 7:

a) Write the algorithm for adding and subtracting numbers in signed-2's complement representation.

b) Show that adding B after the operation A+B'+1 restores the original value of A. What should be done with the end carry?

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Computer Engineering: Digital logic design and computer organization
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