Determining the physical address


Question1) Consider the following C program where M, N, K are predefined constants. Assume int is  4 bytes. Assume this program is executedon a machine with 4KB page size and 32 TLB entries. Initially, TLB is empty. FIFO is utilzed as the replacement algorithm for TLB.

int X[N];
for (int k = 0; k < K; k++)
   for (inti = 0; i< N; i += M) 
       X[i] = random(); //generate some random number

a) If K is 1, what values of M and N will cause a TLB miss for every access of array X. Explain why.

b) If K is a very large number, what values of M and N will cause TLB miss for every access of array X. Explain why.  

Question2) Assume a logical address space is 1KB, and the page-size is 16 bytes. Suppose no page is in the main memory for this process initially and the pure demand paging is used. Current free frame list is {2,5,8,1,…}.  The first frame in the free frame list will be used whenever needed. Suppose TLB has two entries. Both TLB and page table are empty initially. FIFO is used as TLB replacement algorithm. Suppose the following logical address is accessed in order: 0x3d,0x30,0xe5,0x7d, 0x33, 0xef. For each of the following address access:

a) State the physical address that is mapped to it.

b) Assume it takes 10 ns to access TLB, and 100ns to access memory, and 8ms to handle page fault. How long time it takes to access this address?
(Please show the intermediate steps besides final answer)

Question3) Suppose there are only 4 page frames in the physical memory, for the following reference string:

    1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2, 8.
a) What is the minimum number of page faults for the optimal page replacement strategy? Show how the page is placed and how page faults occur.

b) How many page faults occur using LRU? Show how page is placed and how page faults occur.

Question4) Consider the demand-paging system with following time-measured utilizations:   CPU utilization: 10%, Paging disk: 98%, Other I/O devices: 5%. What does this mean? How to improve CPU utilization (Think about both hardware solutions and software solutions). Explain why?  List at least 3 possible solutions.

Question5) Consider computer system with a 32-bit logical address and 4KB page size. System supports up to 512MB of physical memory. How many entries are there in a conventional single-level page table? How many entries are there in an inverted page table? What are page numbers and offsets for the following address references: a) 30000, b) 256, c) 0xbcf034

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Operating System: Determining the physical address
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