The CMOS inverter in Figure 16.21 is biased at VDD = 3.3 V. Let Kn = Kp , VT N = 0.5 V, and VT P = -0.5 V.
(a) Determine the two values of vI and the corresponding values of vO for which (dvO /dvI) = -1 on the voltage transfer characteristics.
(b) Find the noise margins.
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