Question)
• Design a 1-bit full adder
• Verify your design
• Use the 1-bit full adder to build a 4-bit adder with Ci=0
• Verify: 1 + 4, and 9 + 9
• Sram design:
• Cell: p – 0.5/0.045; np – 1/0.1; nd – 2/0.05
• Do: write “1” -> cell
• Read à “1”
• Write “0” -> cell
• Read -> “0”
Report should contain:
1. Short descriptions of your design method and circuits behavior, verification procedure.
2. simulations
3. Draw conclusion