Consider the NMOS RAM cell with resistor load in Figure (b).
Assume parameters values of 
= 80μA/V2, VT N = 0.4 V, VDD = 2.5 V, and R = 1 M Ω.
(a) Design the width-to-length ratio of the driver transistor such that VDS = 20 mV for the on transistor.
(b) Consider a 16-K memory with the cell described in part (a).
Determine the standby cell current and the total memory power dissipation for a standby voltage of VDD = 1.2 V.
