Design the memory array to minimize the number of row and
A 4096-bit RAM consists of 512 words of 8 bits each.
Design the memory array to minimize the number of row and column address decoder transistors required.
How many row and column address lines are required?
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a 4096-bit ram consists of 512 words of 8 bits eachdesign the memory array to minimize the number of row and column
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