Repeat Prob. 6.141 to achieve an average propagation delay of 2 ns with a 0.4 pF load. What is the average power dissipation of this gate with a 20 percent duty cycle?
Problem 6.141
Design an NMOS inverter with resistor load to have an average propagation delay of 2.5 ns with a capacitive load of 1 pF by scaling the reference inverter based upon the results in Table 6.9. What is the average power dissipation of this gate with a 33 percent duty cycle?
