Design an fsm that recognizes an input sequence that has at

Question

1) Toy Processor Programming

In class we discussed 2 ways to write a program that calculates the sum of digits [0,... 9]=45. In a similar way, you are now asked to write 2 programs that load the Accumulator with 100 and then iteratively subtract these digits, so that in the end only 100-45=55 is left in the accumulator. The result should be finally stored in memory location 255. (Note: You are not allowed to first add the digits as we did in class and then subtract from 100.)

2) FSM Design

Design an FSM that recognizes an input sequence that has at least three 1's. More specifically, the FSM has one input, X, and one output, Y. Every clock cycle, a new symbol comes in through the input X. If at least 3 symbols of value "1" have been provided, then the output becomes 1 and remains 1 from then on.

(a) Define the necessary number of states and what each state represents. (Hint: You should be able to do this with 4 states)

(b) Show the state diagram of the FSM with all necessary transitions. Similar to the vending machine that we did in class, use the (condition)/(output) notation on the transition arrows to indicate the output value for each transition.

(c) Encode your 4 states and fill in the following Next State/Output Table

(a)  S0: Q1Q0= 00  S1: Q1Q0=01               S2: Q1Q0=10               S3: Q1Q0=11

Current State		Next State / Output
Q1	Q0	X = 0	X = 1
		/	/
		/	/
		/	/
		/	/

 

Answer 1

As the project that on programming based make an design of given assignment 1) Toy Processor Programming In class we conversed 2 ways to make a program that calculates the sum of digits [0,... 9]=45. In an alike way, you are now asked to write 2 programs that load the Accumulator with 100 and then iteratively subtract these digits, so that in the end only 100-45=55 is left in the accumulator. The consequence must be finally stored in memory location 255. (Note: You aren’t permitted to 1st add the digits as we did in class and then subtract from 100.) 2) FSM Design Design an FSM that recognizes an input sequence which has at least three 1's. More purposely, the FSM has one input, X, and one output, Y. Every clock cycle, a new symbol comes in through the input X. If at least 3 symbols of value "1" have been provided, then the output becomes 1 and remains 1 from then on.