1. Design a BP filter using two-integrator topology. The center frequency is to be 10KHz with a bandwidth of 2KHz. Design to obtain a voltage gain of 26dB.
2. Design an active loaded CS amplifier to obtain a voltage gain of 30V/V. The output load is a 10fF capacitor. Use o.25u CMOS technology. Calculate it's high frequency 3Db value, fH, given that Cgs = 5fF, Cgd = 0.5fF, and signal source resistance, Rsig = 5K.