Design a parity generator for a 3 bit signal bus That is. given three input lines. generate a fourth signal such that an odd number of the four lines is always on.
If two two-bit binary numbers are added together, the answer is a three-bit number. Design a direct two-bit adder. That is a circuit which gives the answer in no more than three gate delay times. In other words, do not design this circuit by using a collection of half-adder circuits.
