1. Design a control circuit for Algorithm 1a for which the sum would not be calculated any further once an overflowhas been detected. Discuss the functions of all individual components.
2. Design a binary multiplier when the operands are all represented in l's complement.
3. Design sequential circuit systems suitable for (a) Algorithm 2a,
(b) Algorithm 2b,
(c) Algorithm 2c, and
(d) Algorithm 2d.