design a 3-bit synchronous counter (using only D-flip flops and NAND gates) that produces the sequence
000, 010, 011, 001, 101, 100, 000, etc.
whenever the single input is 1. The counter retains its current value whenever the input bit is 0. The output should only change on the rising edge of the clock.
derive minimal functions for the flip flop excitations as well.