Design a 3-bit counter, which can count either up or down. The input has a clock, and a signal U. When U = 1, the counter counts up; when U = 0, the counter counts down. For example, assume the current counter Q(t) = 011. If U(t) = 0, then Q(t+1) = 010; if U(t) = 1, then Q(t+1) = 100.
a) Write the excitation table for this finite state machine.
b) Use K-Map to find the minimal cover. The output of these gates are the
inputs for D flip-flops.
c) Draw the circuit of your design, including combinational circuits and D
flip-flops.