Question 1)a) Simplify using K-map. x’y’+ yz+x’yz’.
b) Simplify and implement with 2 level NAND gates.
ab’ + abd + abd’ + a’c’d’ + a’bc’ 3 marks
c) Draw and describe carry look ahead generator.
Question 2)a) Describe 3- state gate.
b) Design Quadruple 2 to 1 line multiplexer.
c) Design 4 bit combinational circuit which gives 2’s complement of given input using only XOR gates.
Question 3)a) What is mealy and moore model?
b) Construct JK flipflop using D flipflop, 2 to 1 line mux and inverter.
c) Design a sequential circuit with two JK flip flops A and B and 2 inputs E and x. If E =0 circuit remains in the same state regardless of the value of x. When E=1, x=1, the circuit goes through the state transition from 00 to 01 to 10 to 11 back to 00 and repeats. When E=1, x=0 the state transition from 00 to 11 to 10 to 01 to 00 and repeats.
Question 4)a) Describe difference among truth table, state table, characteristic table and excitation table.
b) Describe ring counter.
c) Design sequential circuit for serial adder using JK flip flop.
Question 5)a) Obtain Hamming code word for data word 11001001010 at sender.
b) Design logic diagram of a 4 bit binary ripple down counter using flip flop that trigger on positive edge of the clock.
c) Tabulate PLA table for the following functions.
A(x, y, z) = (1, 2, 4, 6)
B(x, y, z) = (0, 1, 6, 7)
C(x, y, z) = ( 1, 2, 3, 5, 7)
Question 6)a) Design block diagram of 3 decade decimal BCD counter.
b) Describe Schmitt trigger.
c) Describe the working of Successive approximation ADC using a block diagram.