Question 1: Assume that we have 3 processes running at the same time as shown in the given table. Each resource just has one instance.
i) Show a possible scenario of resource allocation that outcome in deadlock. By using the resource allocation graph to illustrate the scenario.
ii) To prevent the possibility of any deadlock, you might modify the order of getting resource requests of some process. Describe how and why. You can as well use a resource allocation graph to validate your answer.
Question 2: Consider the given snapshot of a system, answer the given questions by using the banker's algorithm:
i) Find out the content of the matrix need? Is the system in a safe state?
ii) If a request from Process P1 arrives for (0, 4, 2, 0), can the request be granted instantly?
(Please describe the intermediate steps besides final answer)
Question 3: Compare contiguous-memory allocation with pure paging in the given aspects:
i) In support of dynamic memory allocation: most of the systems permit programs to allocate more memory to its address space during execution. Heap and stack are illustrations of such allocated memory.
ii) External fragmentation and internal fragmentation.
iii) Capability to share the code across processes.
Question 4: Consider a computer system with a 32-bit logical address and 4KB page size. The system supports up to 512MB of the physical memory. How many entries are there in the conventional single-level page table? How many entries are there in an inverted page table? Determine the page numbers and offsets for the given address references: i) 30000, ii) 256, iii) 0xbcf034
Question 5: Consider the given C program where M, N, K is predefined constants. Suppose int is 4 bytes. Assume that this program is run on a machine with 4KB page size and 32 TLB entries. Initially, TLB is empty. FIFO is employed as the replacement algorithm for TLB.
int X[N];
for (int k = 0; k < K; k++)
for (inti = 0; i< N; i += M)
X[i] = random(); //generate some random number
i) If K is 1, what values of M and N will cause a TLB miss for each and every access of array X. Describe why.
ii) If K is a very big number, what values of M and N will cause TLB miss for each and every access of array X. Describe why.
Question 6: Assume that a logical address space is 1KB, and the page-size is 16 bytes. Assume that no page is in the main memory for this process initially and the pure demand paging is employed. Current free frame list is {2, 5, 8, 1,…}. The first frame in the free frame list will be employed whenever required. Assume TLB has two entries. Both TLB and page table are empty initially. FIFO is used as TLB replacement algorithm. Assume the given logical address is accessed in order: 0x3d,0x30,0xe5,0x7d, 0x33, 0xef. For each of the given address access:
i) Specify the physical address that is mapped to it.
ii) Assume it takes 10 ns to access TLB, and 100ns to access memory, and 8ms to handle page fault. How long time it takes to access this address?
(Please show the intermediate steps besides the final answer)
Question 7: Suppose there are only 4 page frames in the physical memory, for the given reference string:
1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2, 8.
i) What is the minimum number of page faults for an optimal page replacement strategy? Please show how the page is placed and how page faults take place.
ii) How many page faults occurs using LRU? Please show how the page is placed and how page faults take place.
Question 8: Consider a demand-paging system with the given time-measured utilizations: CPU utilization: 10%, Paging disk: 98%, Other I/O devices: 5%. What does this imply? How to enhance the CPU utilization. Describe why. List at least 3 possible solutions.