de multiplexing address data bus ad7- ad0as it is

Question

De multiplexing Address Data Bus (AD₇- AD₀)

As it is already discussed that  lower  order address bus (A₇- A₀)  is multiplexed  with data bus (D₇- D₀). Hence  pins for  these two  things  are denoted by (AD₇- AD₀). Microprocessor provides address during  earlier part of  the operation on  these  pins. Then  provides  data on the same pin during  later part of the  operations  ( see  timing  diagram also in chapter7).

ALE  ( Address  Latch Enable )  signal is used to de multiplex  these  address data bus.

ALE   goes high  during  earlier part of the operation  which  enable the  latch (see fig) when  the latch ( 74LS373) is  enabled  the address  supplied by  the microprocessor is  available  on the order  side for  the latch  on the low order address bus.  The high  order address is always available on  A₁₅ - A₈ line which  are dedicated for high order address only. In  this way  complete  address is available line  the address  bus (A₁₅ - A₀) which  will memory address is  located on the primary memory  of the microprocessor. Once  the  memory  address is located ALE goes low  which  disables the  latch  hence blocks the bits  available  on multiplexed lines(AD₇ -AD₀) which  may flow  from microprocessor  to memory  ( or I/ O) or vice  versa.